Continuing its evolution in the intelligent, adaptable data center market, Intel just announced its latest series of Stratix 10 FPGAs (Field Programmable Gate Arrays), which incorporate a number of new features and capabilities, have begun shipping in limited quantities to key partners. Intel’s new Stratix 10 DX series of FPGAs bring with them support for the company’s UPI, or Ultra Path Interconnect, in addition to PCI Express 4.0 and Optane DC Persistent memory technology.
As data center workloads become more diverse and complex, the use of flexible, programmable FPGA-based accelerators to complement traditional CPUs, GPUs, and ASICs is becoming increasingly more common. Due to the fact that FPGAs can be programmed and tuned on-the-fly for specific algorithms and workloads that may not be well-suited to CPUs or GPUs, their use in burgeoning fields like machine learning and big data analytics is exploding. In addition to accelerating specific workloads, because FPGAs help offload tasks from other compute engines in a system, they also free those engines to perform other operations, and ultimately increase efficiency and compute density.
New high-speed interconnects key to optimizing performance
“Intel Stratix 10 DX FPGAs are the first FPGAs designed to combine key features that dramatically boost acceleration of workloads in the cloud and enterprise when used with Intel’s portfolio of data center solutions,” said David Moore, Intel vice president and general manager, FPGA and Power Products, Network and Custom Logic Group. “No other FPGA currently offers this combination of features for server designs based on future select Intel Xeon Scalable processors.”
An FPGA’s ultimate performance is significantly impacted by the interface bandwidth and latency between it and its host server’s (or servers’) processors, memory, or other integrated accelerators. By incorporating UPI support into the Stratix 10 DX, Intel claims they’ll be able to communicate with up to 37% lower latency (within a future, Intel-based server architecture), with improved overall system performance, thanks to an increased theoretical peak transfer rate of 28GB/second and coherent data movement.
Support for PCI Express 4.0 also doubles the peak interface bandwidth over PCI Express 3.0, which is much more common today. In fact, in data centers where FPGA-based accelerators are most likely to be used, it’s only AMD’s recently-released EPYC 7000 series processors that support PCIe 4 at this point in time. Intel’s current-generation Xeon platform does not support it. A PCI Express Gen4 x16 interface delivers theoretical peak data bandwidth of 32GB/s, whereas a similar PCI Express 3.0 link tops out at 16GB/s.
Support for innovative new memory technologies
Another feature arriving with the Stratix 10 DX family is support for Optane DC Persistent memory. If you’re unfamiliar with the technology, Intel Optane DC Persistent Memory leverages the company’s 3D XPoint non-volatile memory media. 3D XPoint is a relatively new memory type that not only offers significantly better throughput than NAND flash memory, but speedier DRAM-like access times. 3D XPoint also offers higher endurance than traditional NAND flash memory but can scale to similarly high densities. When Intel jointly announced 3D XPoint in partnership with Micron a few years ago, the companies claimed that, at the chip level, it was 1000x faster than NAND, with 1000x the endurance, and 10x the density potential of DRAM.
Thanks to a newly designed memory controller, Intel Stratix 10 DX FPGAs can support up to eight Intel Optane DC persistent memory modules per FPGA, for up to 4TB of non-volatile memory. Being able to keep that much data so close to the accelerator could have major performance implications for big data workloads, which are often limited by bandwidth and latency, as servers shuffle chunks of massive datasets to and from main system memory. Note, however, that support for Optane DC Persistent memory with coherent memory expansion and hardware acceleration is reserved for some upcoming Intel Xeon Scalable processors. Support isn’t enabled in existing Xeon platforms.
Other features of the Intel Stratix 10 series of FPGAs include 100 GB/second Ethernet connectivity, HBM2 memory stacks and quad-core ARM Cortex-A53 processor subsystems with peripherals.
Although CXL, or the Compute eXpress Link, open interface standard Intel spearheaded is slated to arrive in 2021, the company believes that adding coherent memory and UPI support, along with Optane DC Persistent memory with its Stratix 10 DX FPGAs and next-generation Xeon platform, will help accelerate adoption of workloads that take advantage of coherent cache and memory access across different processors and accelerators, in advance of CXL’s arrival.
As part of a joint press release, Intel and VMWare have also announced a collaboration to develop coherent FPGA and CPU accelerated solutions for cloud and on-premises customer applications. Intel is sampling Stratix 10 FPGAs to its key customers now, though volume production has yet to be disclosed.
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